In the field of circuit board processing, the apertures on the circuit board are generally filled utilizing a method which requires the use of a drilled metal mask and a subsequent planarization step. Specifically, prior art fill processes are carried out by first applying a drilled metal mask, e.g. Cu, to at least one surface of a circuit board having apertures and circuitry therein. The drilled metal mask has openings so as to expose the apertures on said circuit board. Next, a composite comprising a non-photoactive fill material such as a conductive or non-conductive filled dielectric and a carrier is applied to the drilled metal mask so that the fill material is in contact with the metal mask. This structure is then subjected to vacuum lamination to cause the non-photoactive fill material to flow into the apertures of the circuit board. After vacuum lamination, the drilled mask and the fill carrier are removed and the structure is subjected to a planarization process such as chemical mechanical polishing (CMP).
The above described prior art process requires that an extra planarization step, which adds time and cost to the overall process, be employed to provide a planarized surface. A planar surface is essential and required for such structures in order for it to be utilized in subsequent assembly operations such as use of liquid resists for fine line circuitry, plated through hole protection, overmold, globtop or die attach.
In recent technology, liquid solder masks are now being employed to both fill the apertures and to protect the circuitry on the circuit board. A major problem with using such solder masks to fill the apertures and protect the circuitry is that an excessive thin coating of the solder mask material forms around the rim of the apertures. This thin coating is considered a defect and can contribute to high yield loss.
In view of the drawbacks mentioned with prior art processes of filling the apertures of a circuit board, there is a continued need to develop a new method which eliminates the prior art's required use of a planarization step to provide a circuit board structure having a planarized surface. Moreover, there is also a need to develop a method wherein rim defects are substantially eliminated.